Citation: Xu, Q.; Yu, N.; Essaf, F.
Improved Wafer Map Inspection
Using Attention Mechanism and
Cosine Normalization. Machines 2022,
10, 146. https://doi.org/10.3390/
machines10020146
Academic Editors: Kelvin K.L. Wong,
Ahmed Abu-Siada, Dhanjoo
N. Ghista, Andrew W.H. Ip and
Wenjun (Chris) Zhang
Received: 28 December 2021
Accepted: 15 February 2022
Published: 17 February 2022
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Article
Improved Wafer Map Inspection Using Attention Mechanism
and Cosine Normalization
Qiao Xu
1,2,3
, Naigong Yu
1,2,3,
* and Firdaous Essaf
1,2,3
1
Faculty of Information Technology, Beijing University of Technology, Beijing 100124, China;
xuqiao0704@emails.bjut.edu.cn (Q.X.); fessaf@bjut.edu.cn (F.E.)
2
Beijing Key Laboratory of Computing Intelligence and Intelligent System, Beijing University of Technology,
Beijing 100124, China
3
Ministry of Education, Engineering Research Center of Digital Community, Beijing 100124, China
* Correspondence: yunaigong@bjut.edu.cn
Abstract:
Wafer map inspection is essential for semiconductor manufacturing quality control and
analysis. The deep convolutional neural network (DCNN) is the most effective algorithm in wafer
defect pattern analysis. Traditional DCNNs rely heavily on high quality datasets for training. How-
ever, obtaining balanced and sufficient labeled data is difficult in practice. This paper reconsiders
the causes of the imbalance and proposes a deep learning method that can learn robust knowledge
from an imbalanced dataset using the attention mechanism and cosine normalization. We interpret
the dataset imbalance as both a feature and a quantity distribution imbalance. To compensate for
feature distribution imbalance, we add an improved convolutional attention module to the DCNN
to enhance representation. In particular, a feature-map-specific direction mapping module is devel-
oped to amplify the positional information of defect clusters. For quantity distribution imbalance,
the cosine normalization algorithm is proposed to replace the fully connected layer, and classifier
fine-tuning is realized through a small amount of iterative training, which decreases the sensitivity to
the quantitative distribution. The experimental results on real-world datasets demonstrate that the
proposed method significantly improves the robustness of wafer map inspection and outperforms
existing algorithms when trained on imbalanced datasets.
Keywords:
wafer map classification; convolutional neural network; imbalanced dataset; attention
mechanism; cosine normalization
1. Introduction
Wafers are important carriers for semiconductor manufacturing, and their production
process is complex and precise. Wafer production requires a number of processes, such
as dissolution of silica sand, purification, crystal drawing, slicing, and cutting. Then,
lithography, ion implantation, etching, heat treatment and other operations generate chips
(also known as grains) on the wafer. Any fault may result in a product exception. Preceding
chip slicing and packaging, the wafer is usually subjected to a probe test, which checks
the electrical properties of the grains and then labels the failed grains on a wafer map
for technical analysis. Inspection of the wafer map is an important way for improving
product yield and evaluating the manufacturing process [
1
]. When an exception occurs, the
defective grains gather in a distribution pattern on the wafer, allowing engineers to trace the
cause of the failure based on the type of defect cluster. Common wafer map defect patterns
in manufacturing include None, Edge-Ring, Edge-Local, Center, Local, Scratch, Random, Donut
and Near-Full patterns, which are included in the public WM-811K [
2
] real-world dataset.
Figure 1 illustrates the examples of typical patterns, each of them reflects specific process
failure information. For example, the Center pattern means that the mechanical polishing is
uneven, or the pressure of the liquid is abnormal. Abnormal temperature control during
annealing may lead to an Edge-Ring pattern. The Scratch pattern indicates an exception in
Machines 2022, 10, 146. https://doi.org/10.3390/machines10020146 https://www.mdpi.com/journal/machines
