Citation: Lin, J.; Guo, Z.; Chen, X.
MAToC: A Novel Match-Action Table
Architecture on Corundum for 8 ×
25G Networking. Appl. Sci. 2022, 12,
8734. https://doi.org/10.3390/
app12178734
Academic Editor: Alexandros-
Apostolos Boulogeorgos
Received: 4 July 2022
Accepted: 29 August 2022
Published: 31 August 2022
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Article
MAToC: A Novel Match-Action Table Architecture on
Corundum for 8 × 25G Networking
Jiawei Lin
1,2
, Zhichuan Guo
1,2,
* and Xiao Chen
1,2
1
National Network New Media Engineering Research Center, Institute of Acoustics, Chinese Academy of
Sciences, No. 21, North Fourth Ring Road, Haidian District, Beijing 100190, China
2
School of Electronic, Electrical and Communication Engineering, University of Chinese Academy of Sciences,
No. 19(A), Yuquan Road, Shijingshan District, Beijing 100049, China
* Correspondence: guozc@dsp.ac.cn
Abstract:
Packet processing offloads are increasingly needed by high-speed networks. This paper
proposes a high throughput, low latency, scalable and reconfigurable Match-Action Table (MAT)
architecture based on the open source FPGA-based NIC Corundum. The flexibility and capability
of this scheme is demonstrated by an example implementation of IP layer forwarding offload. It
makes the NIC work as a router that can forward packets for different subnet and virtual local area
networks (VLAN). Experiments are performed on a Zynq MPSoC device with two QSFPs and the
results show that it can work at line rate of 8
×
25 Gbps (200 Gbps), within a maximum latency of
76 nanoseconds. In addition, a high-performance MAT pipeline with full-featured, resource-efficient
TCAM and a compact frame merging deparser are presented.
Keywords: fast packet processing; FPGA Offloading; match action table; TCAM
1. Introduction
With the exponential growth of Internet traffic, pure software network stacks with
traditional ASIC NICs can hardly handle all incoming packets at high throughput. Hard-
ware offloading has become an efficient way to catch up with the growing throughput and
latency demands of modern applications in data centers [
1
]. A variety of protocols and jobs
can be offloaded on hardware devices, which provide higher throughput up to line rate and
lower latency down to sub-microsecond. Fast packet processing serves as an infrastructure
for various types of offloading engines that require the processing of packetized data.
However, there are few solutions for packet processing on open-source prototyping
platforms, and there is no way to support multiple connection ports while achieving
200 Gbps line rate processing. To meet the need for packet processing on an open-source
platform for 200 Gbps network, we present a compact MAT-based offloading scheme for
an open-source NIC named Corundum [
2
] and present an example implementation called
MAToC that can perform time-to-live (TTL) decrement, MAC replacement, check summing,
encapsulation of VLAN tag, and packets forwarding according to the destination IP address.
The proposed scheme is scalable to multiple channels of either the transmit, the receive side
or both. It is capable of working at realistic line rate in a link mode of 8
×
25G with two
QSFPs. The delay of the processing scheme is tens of nanoseconds, which is low enough
to meet the latency critical applications. The primary contributions in this paper are as
follows:
•
A MAT-based offloading scheme with throughput up to 200 Gbps is presented. It
can handle traffic from multiple channels, processing and forwarding them to the
designated ports according to reconfigurable matching tables.
•
A resource efficient, low update latency, full featured TCAM with search-prior mecha-
nism is implemented. The proposed TCAM offers decoupled search input and match
Appl. Sci. 2022, 12, 8734. https://doi.org/10.3390/app12178734 https://www.mdpi.com/journal/applsci
